Nowadays, the wireless communication industry plays a much important role in the economic advancement. A variety of Radio Frequency (RF) circuit designs and researches are provided for improving the efficiency or performance of the RF devices.
With respect to the radio frequency transceiver circuit or sub-circuit, such as a low noise amplifier or a power amplifier, the input/output (I/O) pad is exposed directly to the environment through an antenna or other I/O element. Thus, it is possible for the RF transceiver circuit or sub-circuit to be damaged by the electrostatic discharge (ESD) that occurs in the environment because of the weather or other artificial interference.
A traditional ESD protection circuit is shown in FIG. 1. The ESD protection circuit 16 is attached to the I/O pad 14 of the RF circuit 12. The ESD protection circuit 16 comprises a diode 161 connected between the I/O pad 14 and the power source VC, and a diode 163 connected between the I/O pad 14 and the ground. Wherein the diode 161 is used as a positive ESD path, and the diode 163 is used as a negative ESD path.
When a positive ESD occurs at the I/O pad 14, the diode 161 will be under forward-biased condition, and the ESD current will be conducted to the power source VC through the positive ESD path. When a negative ESD occurs at the I/O pad 14, the diode 163 will be under forward-biased condition, and the ESD current will be conducted to the ground through the negative ESD path.
For an ESD protection circuit, the more ESD paths are comprised, the less discharging time is needed, and the more robust the ESD protection circuit is. On the other hand, if there are more diodes used as ESD paths in the ESD protection circuit, the larger the parasitic capacitance is, and the performance of the RF circuit will be degraded much seriously.
Referring to FIG. 2, there is shown a schematic diagram of another conventional ESD protection circuit. The ESD protection circuit 20 is attached to the I/O pad 203 of the RF circuit 201. The ESD protection circuit 20 comprises a plurality pairs of diodes 221, 223, 241, 243, 261, 263, 281, and 283. Each pair of diodes is connected between the power source 205 and the ground 207 in series. The I/O pad 203 and said diodes are connected with transmission lines 251, 253, 255, and 257. Wherein said plurality of diodes are used as positive ESD paths and negative ESD paths for providing high ESD robustness.
The equivalent circuit of the ESD protection circuit 20 is shown in FIG. 3. Wherein each diode acts as an equivalent capacitor, such as 321, 323, 341, 343, 361, 363, 381, and 383, at the operation frequency of the RF circuit 201. Each transmission line acts as an equivalent inductor, such as 351, 353, 355, and 357, at the operation frequency of the RF circuit 201.
Assume that the equivalent capacitance of each diode is CESD, the equivalent inductance of each transmission line is Lline, and the equivalent capacitance of each transmission line is Cline, than the characteristic impedance Zo of the ESD protection circuit is √{square root over ( )}(Lline/(Cline+2CESD)).
In general, the chip size of an RF amplifier is 1.5 mm×1 mm. If the characteristic impedance of the ESD protection circuit 20 fits in with the characteristic impedance of the RF amplifier, i.e. 50 ohm, the length of transmission line in the ESD protection circuit 20 should be 1 mm. This means that an extra chip size area is needed for the ESD protection circuit 20.